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LTC3706 Secondary-Side Synchronous Forward Controller with PolyPhase Capability DESCRIPTIO
The LTC(R)3706 is a PolyPhase capable secondary-side controller for synchronous forward converters. When used in conjunction with the LTC3705 gate driver and primary-side controller, the part creates a complete isolated power supply that combines the power of PolyPhase operation with the speed of secondary-side control. The LTC3706 has been designed to simplify the design of highly efficient, secondary-side forward converters. Working in concert with the LTC3705, the LTC3706 forms a robust, self-starting converter that eliminates the need for the separate bias regulator that is commonly used in secondary-side control applications. In addition, a proprietary scheme is used to multiplex gate drive signals and DC bias power across the isolation barrier through a single, tiny pulse transformer. The LTC3706 provides remote sensing, accurate power good and overvoltage monitoring circuits to support precision, high current applications. A linear regulator controller with thermal protection is also provided to simplify the generation of secondary-side bias voltage. The LTC3706 is available in a 24-lead SSOP package.
FEATURES

Secondary-Side Control for Fast Transient Response Self-Starting Architecture Eliminates Need for Separate Bias Regulator Proprietary Gate Drive Encoding Scheme Reduces System Complexity PolyPhase(R) Operation Reduces CIN Requirements Current Mode Control Ensures Current Sharing PLL Fixed Frequency: 100kHz to 500kHz 1% Output Voltage Accuracy True Remote Sense Differential Amplifier Power Good Output Voltage Monitor High Voltage Linear Regulator Controller Wide Supply Range: 5V to 30V Available in a Narrow 24-Lead SSOP Package
APPLICATIO S

Isolated 48V Telecommunication Systems Internet Servers and Routers Distributed Power Step-Down Converters Automotive and Heavy Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation. PolyPhase is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6144194, other patents pending.
TYPICAL APPLICATIO
VIN+
36V-72V to 3.3V/20A Isolated Forward Converter
T1 Si7852DP MURS120 1F 100V x3 Si7852DP Si7336ADP MURS120 30m 1W 2m 2W CZT3019 FQT7N10 100k BAS21 0.22F L1: COILCRAFT SER2010-122 T1: PULSE PA0807 T2: PULSE PA0297 TS BG IS FB/IN+ LTC3705 FS/IN- GND PGND VSLMT 33nF 162k 33nF 1F T2 IS- IS+ PT + LTC3706 2.2F 16V FG SW SG VIN NDRV VCC FS/SYNC FB ITH 680pF 22.6k 1%
3706 TA01
*
*
1.2 Si7336ADP x2
VIN-
365k 1%
NDRV UVLO 2.2F 25V VCC SS/FLT
BOOST TG
*
*
15k 1%
PT - RUN/SS GND PGND PHASE SLP MODE REGSD
U
U
U
L1 1.2H
VOUT+
CMPSH1-4
330F 6.3V x3
10F 25V
VOUT-
102k 1%
20k
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1
LTC3706
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW SG FG PGOOD MODE PHASE FB ITH RUN/SS VSOUT VS+ VS- 1 2 3 4 5 6 7 8 9 10 11 24 VCC 23 PGND 22 PT+ 21 PT - 20 SW 19 VIN 18 NDRV 17 REGSD 16 IS+ 15 IS- 14 SLP 13 FS/SYNC
VCC ........................................................... - 0.3V to 10V VIN ............................................................ - 0.3V to 33V SW ............................................................... -5V to 50V NDRV ........................................................ - 0.3V to 13V ITH, RUN/SS, VSOUT, VS+, VS-, REGSD ...... - 0.3V to 7V All Other Pins ............................................ - 0.3V to 10V Operating Ambient Temperature Range (Note 2) LTC3706EGN ...................................... - 40C to 85C LTC3706IGN ....................................... - 40C to 85C Operating Junction Temperature (Note 3) ........... 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC3706EGN LTC3706IGN
GND 12
GN PACKAGE 24-LEAD PLASTIC SSOP TJMAX = 125C, JA = 130C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL VFB VFB(LINREG) VFB(LOADREG) VISMAX VISOC gm IRUN/SS(C) IRUN/SS(D) VRUN/SS tON,MIN FG, SG RUP FG, SG RDOWN PT+, PT- RUP PR+, PT- RDOWN VFB(OV) PARAMETER Regulated Feedback Voltage Feedback Voltage Line Regulation Feedback Voltage Load Regulation Maximum Current Sense Threshold Over-Current Shutdown Threshold Transconductance Amplifier gm Soft-Start Charge Current Soft-Start Discharge Current RUN/SS Pin ON Threshold Minimum ON Time FG, SG Driver Pull-Up On Resistance FG, SG Driver Pull-Down On Resistance PT+, PT- Driver Pull-Up Resistance PT+, PT- Driver Pull-Down Resistance Output Overvoltage Threshold Main Control Loop
The indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 7V, VIN = 15V, GND = PGND = 0V, unless otherwise noted.
CONDITIONS (Note 4) ITH = 1.2V VIN = 6V to 30V, ITH = 1.2V Measured in Servo Loop, ITH = 0.5V to 2V RSENSE Mode, 0V < VIS- < 5V VIS- = VCC, 0V < VIS+ < 2V (CT Mode) RSENSE Mode, 0V < VIS- < 5V VIS- = VCC, 0V < VIS+ < 2V (CT Mode) VRUN/SS = 2V VRUN/SS Rising FG, SG Low FG, SG High PT+, PT- Low 15 PT+, PT- High VFB Rising

MIN 0.594
TYP 0.600 0.001 -0.01
MAX 0.606 -0.1 88 1.4 113 1.85 3.10 -6 0.5 2.3 2.3 2.3 2.3 19
UNITS V %/V % mV V mV V mS A A V ns %
68 1.15 87 1.45 2.40 -4 0.4
78 1.28 100 1.65 2.75 -5 3 0.45 200 1.5 1.5 1.5 1.5 17
2
U
W
U
U
WW
W
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LTC3706
ELECTRICAL CHARACTERISTICS
SYMBOL VCC Supply VCCOP VCCREG ICC Operating Voltage Range Regulated Output Voltage Supply Current Operating Shutdown UV Lockout UV Hysteresis Operating Voltage Range Supply Current Normal Mode Shutdown UV Lockout REGSD Shutdown Threshold REGSD Transconductance FS/SYNC Pin Sourcing Current Oscillator Low Frequency Set Point Oscillator High Frequency Set Point Oscillator Resistor Set Accuracy Maximum PLL Sync Frequency Minimum PLL Sync Frequency Power Good Upper Threshold Power Good Lower Threshold Power Good Lower Threshold Gain Common Mode Rejection Ratio Input Resistance -3dB Bandwidth PARAMETER
The indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCC = 7V, VIN = 15V, GND = PGND = 0V, unless otherwise noted.
CONDITIONS MIN 5 6.6 fOSC = 200kHz (Note 5) VRUN/SS = GND VCC Rising
TYP
MAX 10
UNITS V V mA A
7.0 4.2 240
7.4
VUVLO VHYS VIN Supply VINOP IIN
4.52
4.60 0.4
4.70
V V
5 fOSC = 200kHz VRUN/SS = GND VIN Rising VREGSD Rising
30 900 460
V A A
VINUVLO VINHYS VREGSD gm,REGSD IFS fLOW fHIGH f (RFS) fPLL(MAX) fPLL(MIN) PGOOD Output VFBH/0.6 VFBL1/0.6 VFBL2/0.6 ADA CMRR DA RIN fBW
3.90
4.30 0.2 4 5 20
4.51
V V V S A
Oscillator and Phase-Locked Loop VFS/SYNC = GND VFS/SYNC = VCC 75k < RFS/SYNC < 175k 170 255 -20 500 75 VFB Rising VFB Rising VFB Falling 1V VSOUT 5V 115 91.5 89.5 0.994 117 93 91 1 75 80 3 119 94.5 92.5 1.006 200 300 230 345 20 kHz kHz % kHz kHz % % % V/V dB k MHz
Differential Amplifier (VSENSE AMP)
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC3706EGN is guaranteed to meet performance specifications from 0C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3706IGN is guaranteed and tested over the - 40C to 85C operating temperature range. Note 3: Operating junction temperature TJ (in C) is calculated from the ambient temperature TA and the average power dissipation PD (in Watts)
by the formula: TJ = TA + JA * PD Refer to the Applications Information section for details. Note 4: The LTC3706 is tested in a feedback loop that servos VFB to a voltage near the internal 0.6V reference voltage to obtain the specified ITH voltage (VITH = 1.2V). Note 5: Operating supply current is measured in test mode. Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. See Typical Performance Characteristics.
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LTC3706 TYPICAL PERFOR A CE CHARACTERISTICS
VCC Supply Current vs Input Voltage
7 fOSC = 200kHz ALL GATES: CLOAD = 0 7.06 7.04
SUPPLY CURRENT (mA)
6
VCC OUTPUT VOLTAGE (V)
VIS/VIS,MAX (%)
5
4
3 5 6 8 INPUT VOLTAGE (V) 7 9 10
3706 G01
Maximum Current Sense Threshold vs ITH Voltage
100 400 300
IS PIN SOURCE CURRENT (A)
80
VIS/VIS,MAX (%)
200 100 CT-MODE: IIS+ 0 -100 -200 -300 RS-MODE: (IIS+ + IIS-)
IS PIN SOURCE CURRENT (A)
60
40
20
0 0 0.5 1.0 1.5 2.0 ITH VOLTAGE (V) 2.5 3.0
Maximum Current Sense Threshold vs Temperature
101.5 470
PERCENT CHANGE IN FREQUENCY (%)
101.0
VIS/VIS,MAX (%)
100.5
VRUN/SS (mV)
100.0
99.5
99.0 -50
-25
0
25 50 75 TEMPERATURE (C)
4
UW
100
TA = 25C, unless otherwise noted. Maximum Current Sense Threshold vs Duty Cycle
100 RSLP = 0 80 100k RSLP = 50k 40
VCC Regulator Output Voltage vs Temperature
7.02 7.00 6.98 6.96 6.94 6.92 6.90 6.88 6.86 -50
60
20
0 -25 0 25 50 75 TEMPERATURE (C) 100 125 0 20 40 DUTY CYCLE (%)
3706 G02 3706 G03
60
80
IS Pins Source Current
265 260 255 250 245 240 235
IS Pins Source Current vs Temperature
RS-MODE: (IIS+ + IIS-) VIS+ = VIS- = 0V
-400 -1 5 2 3 4 IS+, IS- COMMON-MODE VOLTAGE (V) 0 1 6
230 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
3706 G04
3706 G05
3706 G06
RUN/SS ON Threshold vs Temperature
5 4 3 2 1 0 -1
Oscillator Frequency vs Temperature
460
450
R = 175K fOSC = 500kHz
440
430
125
420 -50
-25
0
25 50 75 TEMPERATURE (C)
100
125
-2 -50
R = 75K fOSC = 100kHz -25 0 25 50 75 TEMPERATURE (C) 100 125
3706 G07
3706 G08
3706 G14
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LTC3706 TYPICAL PERFOR A CE CHARACTERISTICS
Oscillator Frequency vs RFS
600 500 4.005 600.5 4.010
FREQUENCY (kHz)
400
VREGSD (V)
300 200
4.000
VFB (mV)
100 0 50 75 100 125 150 RFS (k) 175 200 3.990 -50 599.0 -50
FB Voltage Line Regulation
601.0
UVLO THRESHOLD VOLTAGE (V)
600.5
VFB (mV)
RDS,ON ()
600.0
599.5
599.0 0 5 15 20 25 VIN SUPPLY VOLTAGE (V) 10 30
3706 G11
Gate Driver On-Resistance vs Temperature
2.50 2.25
EFFICIENCY (%)
VCC = 7V
2.00
RDS,ON ()
1.75 1.50 1.25 1.00 -50
-25
0
25 50 75 TEMPERATURE (C)
UW
100
TA = 25C, unless otherwise noted.
REGSD Shutdown Threshold vs Temperature
601.0
FB Voltage vs Temperature
600.0
3.995
599.5
-25
0
25 50 75 TEMPERATURE (C)
100
125
-25
0
25 50 75 TEMPERATURE (C)
100
125
3706 G09
3706 G10
3706 G15
Undervoltage Lockout vs Temperature
4.65 4.60 4.55 4.50 4.45 4.40 4.35 VIN RISING 4.30 4.25 -50 -25 0 25 50 75 TEMPERATURE (C) 100 125 1.3 1.2 VCC RISING 1.8 1.7 1.6 1.5
Gate Driver On-Resistance vs VCC
PULL-DOWN 1.4 PULL-UP
5
6
7 8 VCC VOLTAGE (V)
9
10
3706 G12
3706 G16
Efficiency (Figure 5)
95 VIN = 36V
Load Step (Figure 5)
VOUT 50mV/DIV
90 VIN = 72V 85
IOUT 10A/DIV
80 125 0 5 10 15 LOAD CURRENT (A) 20 25
3706 G17
20s/DIV VIN = 48V VOUT = 3.3V LOAD STEP = 0A TO 20A
3706 G18
3706 G13
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LTC3706
PI FU CTIO S
SG (Pin 1): Gate Drive for the "Synchronous" MOSFET. FG (Pin 2): Gate Drive for the "Forward" MOSFET. PGOOD (Pin 3): Open-Drain Power Good Output. The FB pin is monitored to ensure that the output is in regulation. When the output is not in regulation, the PGOOD pin is pulled low. MODE (Pin 4): Tie to either VSS or VCC to set the maximum duty cycle at either 50% or 75% respectively. Tie to ground through either a 200k or 100k resistor (50% or 75% maximum duty cycle) to disable pulse encoding. In this mode, normal PWM signals will be generated at the PT+ pin, while a clock signal is generated at the PT- pin. PHASE (Pin 5): Control Input to the Phase Selector. This pin determines the phasing of the controller CLK relative to the synchronizing signal at the FS/SYNC pin. FB (Pin 6): The Inverting Input of the Main Loop Error Amplifier. ITH (Pin 7): The Output of the Main Loop Error Amplifier. Place compensation components between the ITH pin and GND. RUN/SS (Pin 8): Combination Run Control and Soft-Start Inputs. A capacitor to ground sets the ramp time of the output voltage. Holding this pin below 0.4V causes the IC to shut down all internal circuitry. VSOUT, VS+, VS- (Pins 9, 10, 11): VSOUT is the output of a precision, unity-gain differential amplifier. Tie VS+ and VS- to the output of the main DC/DC converter to achieve true remote differential sensing. This allows DCR error effects to be minimized. GND (Pin 12): Signal Ground. FS/SYNC (Pin 13): Combination Frequency Set and SYNC pin. Tie to VSS or VCC to run at 100kHz and 300kHz respectively. Place a single resistor to ground at this pin to set the frequency between 50kHz and 500kHz. To synchronize, drive this pin with a clock signal to achieve PLL synchronization from 100kHz to 500kHz. Sources 20A of current. SLP (Pin 14): Slope Compensation Input. Place a single resistor to ground to set the desired amount of slope compensation. IS- (Pin 15): Negative Input to the Current Sense Circuit. When using current sense transformers, this pin may be tied to VCC for single-ended sensing with a 1.28V maximum current trip level. IS+ (Pin 16): Positive Input to the Current Sense Circuit. Connect to the positive end of a current sense resistor or to the output of a current sense transformer. REGSD (Pin 17): This pin is used to prevent overheating of the external linear regulator pass device that generates the VCC supply voltage from the VIN voltage. A current proportional to the voltage across the external pass device flows out of this pin. The IC shuts down the linear regulator when the voltage on this pin exceeds 4V. Place a resistor (or a resistor and capacitor in parallel) between this pin and GND to limit the temperature rise of the external pass device. NDRV (Pin 18): Drive Output for the External Pass Device of the VCC Linear Regulator. Connect to the base (NPN) or gate (NMOS) of an external N-type device. VIN (Pin 19): Connect to a higher voltage bias supply, typically the output of a peak detected bias winding. When not used, tie together with the VCC and NDRV pins. SW (Pin 20): Connect to the drain of the "synchronous" MOSFET. This input is used for adaptive shoot-through prevention and leading edge blanking. PT -, PT + (Pins 21, 22): Pulse Transformer Driver Outputs. For most applications, these connect to a pulse transformer (with a series DC blocking capacitor). The PWM information is multiplexed together with DC power and sent through a single pulse transformer to the primary side. This information may be decoded by the LTC3705 gate driver and primary-side controller. PGND (Pin 23): Gate Driver Ground Pin. VCC (Pin 24): Main VCC Input for all Driver and Control Circuitry.
6
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U
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3706f
LTC3706
BLOCK DIAGRA
IS+ 16 2x
+
32x
IS- 15
-
2V
+
C
-
ITH 7 0.60V FB 6 SLP 14 FS/SYNC 13 PHASE 5 MODE 4 DRIVE/DMAX CONTROL OSC AND PLL
+
EA
gm = 2.8mS 2.5V RUN/SS SLOPE COMP 1 3.2V
-
4VSB RUN/SS 8 FB VCCUV SOFTSTART SHDN SSLOW WAIT
4VSB RESTRT1 VSOUT 9 40k VS+ 10
40k
+
VSENSE AMP
-
VS- 11 40k 40k
W
+
C VCC ITRP RESET DOMINANT WAIT OVP R Q S 0.25V PWM WAIT OVP VCC FG 2 PGND 23 SG 1
-
+
C
SKIP
DMAX
+ -
VCC
0.2V SW
-
BLANK ZERO CROSSING DETECT
20
+
C OC DRIVER ENCODING AND LOGIC
PT + 22 PGND
-
OVERCURRENT
VCC
*
PT - 21
*
PULSE XFMR
BLANK DMAX
DRIVE TYPE
5VDC TO 30VDC UVLO VINUV REG 4VSB 4VSB 60k R S OT LATCH OT 4VSB VIN Q 275k OC VREF 1.24V
VIN 19
+
A
NDRV 18 SHDN VCC 24 5VDC TO 10VDC gm = 5S REGSD 17
-
+ -
4V
VIN
+
A
VCC
-
PGOOD
VCC UVLO
SHDN
VCCUV
FB 0.6V
PGOOD/OVP
OVP
3 GND 12
3706 BD
(4.25/4.5)
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LTC3706
OPERATIO
Main Control Loop The LTC3706 is designed to work in a constant frequency, current mode 2-transistor forward converter. During normal operation, the primary-side MOSFETs (both top and bottom) are "clocked" on together with the forward MOSFET on the secondary side. This applies the reflected input voltage across the inductor on the secondary side. When the current in the inductor has ramped up to the peak value as commanded by the voltage on the ITH pin, the current sense comparator is tripped, turning off the primary-side and forward MOSFETs. To avoid turning on the synchronous MOSFET prematurely and causing shoot-through, the voltage on the SW pin is monitored. This voltage will usually fall below 0V soon after the primary-side MOSFETs have turned completely off. When this condition is detected, the synchronous MOSFET is quickly turned on, causing the inductor current to ramp back downwards. The error amplifier senses the output voltage, and adjusts the ITH voltage to obtain the peak current needed to maintain the desired main-loop output voltage. The LTC3706 always operates in a continuous current, synchronous switching mode. This ensures a rapid transient response as well as a stable bias supply voltage at light loads. A maximum duty cycle (either 50% or 75%) is internally set via clock dividers to prevent saturation of the main transformer. In the event of an overvoltage on the output, the synchronous MOSFET is quickly turned on to help protect critical loads from damage. Gate Drive Encoding Since the LTC3706 controller resides on the secondary side of an isolation barrier, communication to the primaryside power MOSFETs is generally done through a transformer. Moreover, it is often necessary to generate a low voltage bias supply for the primary-side gate drive circuitry. In order to reduce the number of isolated windings present in the system, the LTC3706 uses a proprietary scheme to encode the PWM gate drive information and multiplex it together with bias power for the primary-side drive and control, using a single pulse transformer. Note that, unlike optoisolators and other modulation techniques, this multiplexing scheme does not introduce a significant time delay into the system.
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For most forward converter applications, the PT+ and PT- outputs will contain a pulse-encoded PWM signal. These outputs are driven in a complementary fashion with an essentially constant 50% duty cycle. This results in a stable volt-second balance as well as an efficient transfer of bias power across the pulse transformer. As shown in Figure 1, the beginning of the positive half-cycle coincides with the turn-on of the primary-side MOSFETs. Likewise, the beginning of the negative half-cycle coincides with the maximum duty cycle (forced turn-off of primary switches). At the appropriate time during the positive half-cycle, the end of the "on" time (PWM going LOW) is signaled by briefly applying a zero volt differential across the pulse transformer. Figure 1 illustrates the operation of this multiplexing scheme. The LTC3705 primary-side controller and gate driver will decode this PWM information as well as extract the power needed for primary-side gate drive.
DUTY CYCLE = 15% 150ns 7V 7V DUTY CYCLE = 0% 150ns VPT1+ - VPT1- -7V 1 CLK PER -7V 1 CLK PER
3706 F01
Figure 1: Gate Drive Encoding Scheme (VMODE = GND)
Self-Starting Architecture When the LTC3706 is used in conjunction with the LTC3705 primary-side controller and gate driver, a complete selfstarting isolated supply is formed. When input voltage is first applied in such an application, the LTC3705 will begin switching in an "open-loop" fashion, causing the main output to slowly ramp upwards. This is the primary-side soft-start mode. On the secondary side, the LTC3706 derives its operating bias voltage from a peak-charged capacitor. This peak-charged voltage will rise more rapidly than the main output of the converter, so that the LTC3706 will become operational well before the output voltage has reached its final value.
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LTC3706
OPERATIO
When the LTC3706 has adequate operating voltage, it will begin the procedure of assuming control from the primary side. To do this, it first measures the voltage on the power supply's main output and then automatically advances its own soft-start voltage to correspond to the main output voltage. This ensures that the output voltage increases monotonically as the soft-start control is transferred from primary to secondary. The LTC3706 then begins sending PWM signals to the LTC3705 on the primary side through a pulse transformer. When the LTC3705 has detected a stable signal from the secondary controller, it transfers control of the primary switches over to the LTC3706, beginning the secondary-side soft-start mode. The LTC3706 continues in this mode until the output voltage has ramped up to its final value. If for any reason, the LTC3706 either stops sending (or initially fails to send) PWM information to the LTC3705, the LTC3705 will detect a FAULT and initiate a soft-start retry. (See the LTC3705 data sheet.) Slope Compensation Slope compensation is added at the input of the PWM comparator to improve stability and noise margin of the peak current control loop. The amount of slope compensation can be selected from one of five preprogrammed values using the SLP pin as shown in Table 1. Note that the amount of slope compensation doubles when the duty cycle exceeds 50%.
Table 1
SLP PIN GND VCC 400k to GND 200k to GND 100k to GND 50k to GND SLOPE (D < 0.5) 0.05 * ISMAX * fOSC None 0.1 * ISMAX * fOSC 0.15 * ISMAX * fOSC 0.25 * ISMAX * fOSC 0.5 * ISMAX * fOSC SLOPE (D > 0.5) 0.1 * ISMAX * fOSC None 0.2 * ISMAX * fOSC 0.3 * ISMAX * fOSC 0.5 * ISMAX * fOSC 1.0 * ISMAX * fOSC
In Table 1 above, ISMAX is the maximum current limit, and fOSC is the switching frequency.
Current Sensing and Current Limit For current sensing, the LTC3706 supports either a current sense resistor or a current sense transformer. The current sense resistor may either be placed in series with
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the inductor (either high side or ground lead sensing), or in the source of the "forward" switch. If a current sense transformer is used, the IS- input should be tied to VCC and the IS+ pin to the output of the current sense transformer. This causes the gain of the internal current sense amplifier to be reduced by a factor of 16x, so that the maximum current sense voltage (current limit) is increased from 78mV to 1.28V. An internal, adaptive leading edge blanking circuit ensures clean operation for "switch" current sensing applications. Current limit is achieved in the LTC3706 by limiting the maximum voltage excursion of the error signal (ITH voltage). Note that if slope compensation is used, the precise value at which current limit occurs will be a function of duty cycle (See Typical Performance Characteristics). If a short circuit is applied, an independent overcurrent comparator may be tripped. In this case, the LTC3706 will enter a "hiccup" mode using the soft-start circuitry. Frequency Setting and Synchronization The LTC3706 uses a single pin to set the operating frequency, or to synchronize the internal oscillator to a reference clock with an on-chip phase-locked loop (PLL). The FS pin may be tied to GND, VCC or have a single resistor to GND to set the switching frequency. If a clock signal (>2V) is detected at the FS pin, the LTC3706 will automatically synchronize to the rising edge of the reference clock. Table 2 summarizes the operation of the FS pin. For synchronization between multiple LTC3706s, the PT + pin of one LTC3706 can be used as a master clock reference and tied to the FS pin of the other LTC3706s.
Table 2
FS PIN GND VCC RFS to GND Reference Clock SWITCHING FREQUENCY 200kHz 300kHz fOSC (Hz) = 4RFS - 200k fOSC = fREF (75kHz to 500kHz)
This will cause all LTC3706's to operate at the same frequency. The phase angle of each LTC3706 that is being synchronized can be set by using the PHASE pin. This pin can be tied to GND, VCC or have a single resistor to VCC to
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LTC3706
OPERATIO
set the phase angle (delay) of the internal oscillator relative to the incoming sync signal on the FS pin. Any one of six preset values can be selected as summarized in Table 3.
Table 3
PHASE PIN GND VCC 200k to VCC 100k to VCC 50k to VCC LTC3706 PHASE DELAY 0 180 60 90 120
Soft-Start The soft-start circuitry has five functions: 1) to provide a shutdown, 2) to provide a smooth ramp on the output voltage during start-up, 3) to limit the output current in a short-circuit situation by entering a hiccup mode, 4) to limit the maximum power dissipation in the external linear regulator via the REGSD pin, and 5) to communicate fault and shutdown information between multiple LTC3706s in a PolyPhase application. When the RUN/SS pin is pulled to GND, the chip is placed into shutdown mode. If this pin is released, the RUN/SS pin is initially charged with a 50A current source. After the RUN/SS pin gets above 0.5V, the chip is enabled. At the instant that the LTC3706 is first enabled, the RUN/SS voltage is rapidly preset to a voltage that will correspond to the main output voltage of the DC/DC converter. (See the Self-Starting Architecture section.) After this preset interval has completed, the normal soft-start interval begins and the charging current is reduced to 5A. The external soft-start voltage is used to internally ramp up the 0.6V reference (positive) input to the error amplifier. When fully charged, the RUN/SS voltage remains at 3V. In the event that the sensed switch or inductor current exceeds the overcurrent trip threshold, an internal fault latch is tripped. This latch is also tripped when the REGSD voltage exceeds 4V (see the Linear Regulator section). When such a fault is detected, the LTC3706 immediately goes to zero duty cycle and initiates a soft-start retry. Prior to discharging the soft-start capacitor, however, the LTC3706 first puts a voltage pulse on the RUN/SS pin,
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which trips the fault latch in any other LTC3706 that shares the RUN/SS. This ensures an orderly shutdown of all phases in a PolyPhase application. After the soft-start capacitor is fully discharged, the LTC3706 attempts a restart. If the fault is persistent, the system enters a "hiccup" mode. Note that in self-starting secondary-side control applications (with the LTC3705), the presence of the LT3706 bias voltage is dependent upon the regular switching of the primary-side MOSFETs. Therefore, depending on the details of the application circuit, the LTC3706 may lose its bias voltage after a fault has been detected and before completing a soft-start retry. In this case, the "hiccupmode" operation is actually governed by the LTC3705 soft-start circuitry. (See the LTC3705 data sheet.) Drive Mode and Maximum Duty Cycle Although the LTC3706 is primarily intended to be used with the LTC3705 in 2-transistor forward applications, the MODE pin provides the flexibility to use the LTC3706 in a wide variety of additional applications. This pin can be used to defeat the gate drive encoding scheme, as well as change the maximum duty cycle from its default value of 50%. The use of the MODE pin is summarized in Table 4. When the gate drive encoding scheme is defeated, a standard PWM-style signal will be present at the PT+ pin and a reference clock (in phase with the PWM signal) will be present at the PT- pin. These outputs can be used in "standalone" applications (without the LTC3705) to drive the gates of MOSFETs in a conventional manner.
Table 4
MODE PIN GND VCC 200k to GND 100k to GND PT+/PT- Mode (MAX DUTY CYCLE) Encoded PWM (DMAX = 50%) Encoded PWM (DMAX = 75%) Standard PWM (DMAX = 50%) Standard PWM (DMAX = 75%) INTENDED APPLICATION 2-Switch Forward with LTC3705 1-Switch Forward 2-Switch Forward Standalone 1-Switch Forward Standalone
3706f
LTC3706
OPERATIO
Power Good/Overvoltage Protection This circuit monitors the voltage on the FB input. The open-drain PGOOD output will be logic high if the voltage on the FB pin is within +17%/-7% of 0.6V. If the voltage on the FB pin exceeds 117% of 0.6V (0.7V), an overvoltage (OVP) is detected. For overvoltage protection, the secondary-side synchronous MOSFET is turned on while all other MOSFETs are turned off. This protection mode is not latched, so that the overvoltage detection is cleared if the FB voltage falls below 115% of 0.6V (0.69V). Linear Regulator Operation The LTC3706 provides a linear regulator controller that drives an external N-type pass device. This controller is used to create a 7V DC bias from the peak-charged secondary bias voltage (8V to 30V). Internal divider resistors are used to establish a regulation voltage of 7V at the VCC pin. An auxiliary bias supply with a regulated voltage greater than 7V may be applied to the VCC pin to bypass (bootstrap) the linear regulator. This improves efficiency and also helps to avoid overheating the linear regulator pass device. Thermal protection for the linear regulator pass device is also provided by means of the REGSD pin. A current is
APPLICATIO S I FOR ATIO
Start-Up Considerations
In self-starting applications, the LTC3705 will initially begin the soft-start of the converter in an open-loop fashion. After bias is obtained on the secondary side, the LTC3706 assumes control and completes the soft-start interval. In order to ensure that control is properly transferred from the LTC3705 (primary-side) to the LTC3706 (secondary-side), it is necessary to limit the rate of rise on the primary-side soft-start ramp so that the LTC3706 has adequate time to wake up and assume control before the output voltage gets too high. This condition is satisfied for many applications if the following relationship is maintained: CSS,SEC CSS PRI
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sourced from this pin that is proportional to the voltage across the linear regulator pass device (VIN - VCC). Since the VCC load current is essentially constant for a given switching frequency and choice of power MOSFETs, the power dissipated in the external pass device will only vary with the voltage across it. Thus, a single resistor may be placed between the REGSD pin and GND to develop a voltage that is proportional to the power in the external pass device. An additional parallel capacitor can also be used to account for the thermal time constant associated with the external pass device itself. When the voltage on the REGSD pin exceeds 4V, an overtemperature fault occurs and the LTC3706 attempts a soft-start retry. Slave Mode Operation When two or more LTC3706 devices are used in PolyPhase systems, one device becomes the "master" controller, while the others are used as "slaves." Slave mode is activated by connecting the FB pin to VCC. In this mode, the ITH pin becomes a high impedance input, allowing it to be driven by the master controller. In this way, equal inductor currents are established in each of the individual phases. Also, in slave mode the soft-start charge/discharge currents are disabled, allowing the master device to control the charging and discharging of the soft-start capacitor. However, care should be taken to ensure that soft-start transfer from primary-side to secondary-side is completed well before the output voltage reaches its target value. A good design goal is to have the transfer completed when the output voltage is less than one-half of its target value. Note that the fastest output voltage rise time during primary-side soft-start mode occurs with maximum input voltage and minimum load current. The open-loop start-up frequency on the LTC3705 is set by placing a resistor from the FB/IN + pin to GND. Although the exact start-up frequency on the primary side is not critical, it is generally good practice to set this approximately equal to the operating frequency on the secondary
3706f
11
LTC3706
APPLICATIO S I FOR ATIO
side. The FS/IN- start-up resistor for the LTC3705 may be selected using the following:
3.2 * 1010 fPRI (Hz) = RFS /IN- + 10k
In the event that the secondary-side circuitry fails to properly start up and assume control of switching, there are several fail-safe mechanisms to help avoid overvoltage conditions. First, the LTC3705 contains a volt-second clamp that will keep the primary-side duty cycle at a level that cannot produce an overvoltage condition. Second, the LTC3705 contains a time-out feature that will detect a FAULT if the LTC3706 fails to start up and deliver PWM signals to the primary side. Finally, the LTC3706 has an independent overvoltage detection circuit that will crowbar the output of the DC/DC converter using the synchronous MOSFET switch. In the event that a short circuit is applied to the output of the DC/DC converter prior to start-up, the LTC3706 will generally not receive enough bias voltage to operate. In this case, the LTC3705 will detect a FAULT for one of two reasons: 1) the start-up time-out feature will be activated since the LTC3706 never sends signals to the primary side or 2) the primary-side overcurrent circuit will be tripped because of current buildup in the output inductor. In either case, the LTC3705 will initiate a shutdown followed by a soft-start retry. See the LTC3705 data sheet for further details. Bias Supply Generation Figure 2 shows a commonly used method of developing a VCC bias supply for the LTC3706. During start-up, bias winding 1 uses a peak detection method to rapidly develop a VIN voltage for the LTC3706, which in turn drives the linear regulator that generates the VCC voltage (7V). When the main output of the converter is in regulation, winding 2 (configured as a forward-style output) is designed to produce a regulated auxiliary voltage of approximately 7.5V to 8.5V. Since the auxiliary voltage is greater than that of the linear regulator, the linear regulator will effectively be shut down. Note that the output inductor L1 must be adequately large so that its ripple current is continuous
*
1
12
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given the amount of VCC load current, thereby providing a stable output voltage.
BAS21 1mH BAS21 MBRO530 4.7 * WINDING 1 NB1
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*
WINDING 2 NB2
FMMT491A 1F 50V 4.7F 16V
MAIN TRANSFORMER
VIN LTC3706 REGSD NDRV
CREGSD
RREGSD
VCC
3706 F02
Figure 2. Typical Bias Supply Configuration
The turns ratio (NB1) of the bias winding 1 should be chosen to ensure that there is adequate voltage to operate the LTC3706 over the entire range for the DC/DC converter's input bus voltage (VBUS). This may be calculated using:
NB1 =
VCC(MIN) + 1.5V VBUS(MIN)
VCC(MIN) can be as low as 5V (if this provides adequate gate drive voltage to maintain acceptable efficiency) or as high as 7V. For VCC(MIN) = 6V and VBUS = 36V to 72V, this would mean a turns ratio of NB1 0.21 and a VIN voltage range at the LTC3706 of 7.5V to 15V. Using the bias circuit of Figure 2, the linear regulator would normally operate only for a brief interval during the initial soft-start ramp of the main output voltage. Under some fault conditions (e.g., output overload), the auxiliary voltage produced by bias winding 2 may decrease below 7V, causing the linear regulator to again supply the VCC bias current. Since the amount of power dissipation in the linear regulator pass device may be quite high, it can take considerable board area when the linear regulator pass device is sized to handle this power continuously. As an alternative, the REGSD pin may be used to effectively detect an overtemperature condition on the linear regulator pass device and generate a shut down (soft-start retry) before overheating occurs. This allows for the use of a
3706f
LTC3706
APPLICATIO S I FOR ATIO
small (e.g., SOT-23) package for the linear regulator pass device. The REGSD resistor should be selected based upon the steady-state (DC) thermal impedance of the linear regulator pass device.
RREGSD = 960k
JA * ICC(MAX) TRISE(MAX)
where JA is the DC thermal impedance of the linear regulator pass device and TRISE(MAX) is the maximum junction temperature rise desired for the pass device. The value for ICC(MAX) depends heavily on the particular switching MOSFETs used, as well as on the details of overall system design. Note that it may include the bias current associated with the primary-side gate driver and controller, if the LTC3705 is being used. The value for ICC is best determined experimentally and then guard banded appropriately to establish ICC(MAX). Using the Typical Application circuit on the first page of this data sheet as an example, if a SOT-23 MOSFET is chosen, we might have JA = 150C/W, tRISE(MAX) = 50C and ICC(MAX) = 35mA so that RREGSD 100k. In this case, the linear regulator can run continuously for any VIN voltage that is less than: 4V = (VIN - VCC)(5s)(RREGSD)
640k VIN(MAX) = + 7V RREGSD
or 13.4V. In addition, a capacitor may be added in parallel with the REGSD resistor to delay the thermal shutdown and thereby account for the thermal time constant of the pass device. When using a delay capacitor, care must be taken to ensure that the safe operating area (SOA) of the pass device is not exceeded. The capacitor should be chosen to provide a time constant that is somewhat faster than the thermal time constant of the pass device in the system. This technique will allow for much higher transient power dissipation, which is particularly useful in larger (PolyPhase) systems that have a higher VCC bias
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current. For the above SOT-23 example, a capacitor CREGSD = 1F provides a linear regulator shutdown delay given by:
1 tSHDN = (C REGSD )(RREGSD ) ln 640k 1- (VIN - 7)RREGSD
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or 33ms at VIN = 30V. This delay provides ample time for linear regulator operation during soft-start, while providing protection for the pass device during fault conditions such as input overvoltage or output overcurrent. Current Sensing The LTC3706 provides considerable flexibility in current sensing techniques. It supports two main methods: 1) resistive current sensing and 2) current transformer current sensing. Resistive current sensing is generally simpler, smaller and less expensive, while current transformer sensing is more efficient and generally appropriate for higher (>20A) output currents. For resistive current sensing, the sense resistor may be placed in any one of three different locations: high side inductor, low side inductor or low side switch, as shown in Figure 3. Sensing the inductor current (high side or low side) is generally less noisy but dissipates more power than sensing the switch current (Figures 3a and 3b). High side inductor current sensing provides a more convenient layout than low side (no split ground plane), but can only be used for output voltages up to 5.5V, due to the common mode limitations of the current sense inputs (IS+ and IS-). For most applications, low side switch current sensing will be a good solution (Figure 3c). For high current applications where efficiency (power dissipation) is very important, a current sense transformer may be used. As shown in Figure 3d, the IS- pin should be tied off to VCC when a current sense transformer is used. This causes the IS+ pin to become a single ended (nondifferential) current sense input with a maximum current sense voltage of 1.28V. Figure 3d shows a typical application circuit using a current transformer.
3706f
13
LTC3706
APPLICATIO S I FOR ATIO
* *
IS+ LTC3706 IS- 78mV MAX
3706 F03a
Figure 3a. High Side Inductor: Easier Layout, Low Noise, Accurate
*
*
IS+ LTC3706 IS- 78mV MAX
3706 F03c
Figure 3c. Switch Current Sensing: Easy Layout, Accurate, Higher Efficiency, High VOUT Capable
Figure 3. Current Sensing Techniques
PolyPhase Applications Figure 4 shows the basic connections for using the LTC3705 and LTC3706 in PolyPhase applications. One of the phases is always identified as the "master," while all other phases are "slaves." For the LTC3705 (primary side), the master monitors the VIN voltage for undervoltage, performs the open-loop start-up and supplies the initial VCC voltage for the master and all slaves. The LTC3705 slaves simply stand by and wait for PWM signals from their respective pulse transformers. Since the SS/FLT pins of master and slave LTC3705's are interconnected, a FAULT (overcurrent, etc.) on any one of the phases will perform a shutdown/ restart on all phases together. The LTC3705 is put into slave mode by omitting the resistor on FS/IN-. For the LTC3706, the master performs soft-start and voltage-loop regulation by driving all slaves to the same current as the master using the ITH pins. Faults and shutdowns are communicated via the interconnection of the RUN/SS pins. The LTC3706 is put into slave mode by tying the FB pin to VCC.
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IS+ LTC3706 IS- 78mV MAX
3706 F03b
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Figure 3b. Low Side Inductor: Accurate, Low Noise, High VOUT Capable
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* * *
1.28V MAX TRIP 5 TO 50
IS+ LTC3706 IS-
VCC
3706 F03d
Figure 3d. Current Transformer: Highest Efficiency, High VOUT Capable
VIN+ VBIAS
VOUT+
VIN NDRV VCC NDRV UVLO VCC SS/FLT LTC3705 (MASTER) VIN- FS/IN- FB/IN+ FS/SYNC PT + FB ITH PT - RUN/SS LTC3706 (MASTER)
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*
VIN NDRV VCC NDRV SS/FLT FB/IN+ VCC UVLO FS/IN- RUN/SS FS/SYNC
*
*
PT + PT -
FB ITH PHASE LTC3706 (SLAVE)
LTC3705 (SLAVE)
3706 F05
Figure 4. Connections for PolyPhase Operation
3706f
LTC3706
PACKAGE DESCRIPTIO
.254 MIN
.0165 .0015 RECOMMENDED SOLDER PAD LAYOUT
.0075 - .0098 (0.19 - 0.25)
0 - 8 TYP
.016 - .050 (0.406 - 1.270)
NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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GN Package 24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 - .344* (8.560 - 8.738) 24 23 22 21 20 19 18 17 16 15 1413
.045 .005 .033 (0.838) REF
.229 - .244 (5.817 - 6.198)
.150 - .165
.150 - .157** (3.810 - 3.988)
1
.0250 BSC
23
4
56
7
8
9 10 11 12
.015 .004 x 45 (0.38 0.10)
.0532 - .0688 (1.35 - 1.75)
.004 - .0098 (0.102 - 0.249)
.008 - .012 (0.203 - 0.305) TYP
.0250 (0.635) BSC
GN24 (SSOP) 0204
3706f
15
LTC3706
TYPICAL APPLICATIO
VIN+ L1 1H
1F 100V
1F 100V x3
VIN- 100k FQT7N10 BAS21 0.22F
365k 1%
NDRV UVLO
BOOST TG TS BG IS FB/IN+
1nF 2.2F 25V 15k 1% 33nF
LTC3705 VCC SS/FLT GND PGND VSLMT FS/IN-
Figure 5. 36V-72V to 3.3V/20A Isolated Forward Converter (See Typical Performance Characteristics)
RELATED PARTS
PART NUMBER LT1534 LT1619 LT1681/LT3781 LT1693 LTC1698 DESCRIPTION Ultralow Noise 2A Switching Regulator Low Voltage Current Mode Controller Dual Transistor Synchronous Forward Controller High Speed MOSFET Driver Secondary Synchronous Rectifier Controller COMMENTS Reduces Conducted and Radiated EMI, Low Switching Harmonics, 20kHz to 250kHz Switching Frequency 1.9V VIN 18V, 300kHz Operation, Boost, Flyback, SEPIC Operation Up to 72V Maximum 1.5A Peak Output Current, 16ns Rise/Fall Time at VCC = 12V, CL = 1nF Use with the LT1950 or LT1681, Isolated Power Supplies, Contains Voltage Margining, Optocoupler Driver, Synchronization Circuit with the Primary Side No Optoisolator Required, Accurate Regulation Without User Trims, 50kHz to 250kHz Switching Frequency, SSOP-16 Package Operation as Low as 2.5V Input, Boost, Flyback, SEPIC 8V to 48V Supply Range, Protected -15V to 60V Supply Transient Synchronous, Single Inductor, No Schottky Diode Required 2.5V VIN 36V, No RSENSE Current Mode Operation, Excellent Transient Response Use with LTC3706, Isolated Power Supplies, High Speed Gate Drivers Synchronous; ZVS Operation; 24-Pin SSOP
LT1725 LTC1871 LT1910 LTC3440 LTC3704 LTC3705 LTC3722
General Purpose Isolated Flyback Controller Wide Input Range, No RSENSETM Controller Protected High Side MOSFET Driver Micropower Buck-Boost DC/DC Converter Positive-to-Negative DC/DC Controller Two-Switch Forward Converter Gate Driver and Controller Full Bridge Controller
No RSENSE is a trademark of Linear Technology Corporation.
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
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MURS120 T1 Si7852DP
*
*
9:2 Si7336ADP
1nF 100V
10 0.25W 1nF 100V 10 0.25W
L2 1.2H 1.2
VOUT+
Si7852DP
Si7336ADP x2
1F CMPSH1-4
330F 6.3V x3
MURS120 30m 1W 100 680pF L1: VISHAY IHLP-2525CZ-01 L2: COILCRAFT SER2010-122 T1: PULSE PA0807 T2: PULSE PA0297 T2 100 470pF 0.1F 5k 1:2 162k 33nF 100 1nF IS- IS+ PT + 1F LTC3706 ITH PT - RUN/SS GND PGND PHASE SLP MODE REGSD 100k 100 2.2nF 250V 2m 2W CZT3019 2.2F 16V FG SW SG VIN NDRV VCC FS/SYNC FB 102k 1% 10F 25V
VOUT-
*
*
680pF 20k 22.6k 1%
3706 F05
3706f LT/TP 0405 500 * PRINTED IN THE USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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